We are seeking an experienced and driven IP Design Verification Engineer to join our dynamic team. In this role, you will play a critical part in ensuring that our cutting-edge IP designs meet stringent specification and quality standards.
Your contributions will directly impact the development of innovative technologies that advance Intel's leadership in the semiconductor industry. By collaborating with a multidisciplinary team of architects, RTL developers, and physical design engineers, you will help shape the future of computing by ensuring robust verification processes and methodologies.
Responsibilities will include but are not limited to:
- Develop verification plans, test benches, and environments to ensure coverage and compliance with microarchitecture specifications.
- Execute verification strategies, including system-level simulations, to validate design functionality, timing, and power requirements.
- Identify, replicate, root cause, and debug issues within the pre-silicon environment, implementing corrective measures to resolve failures.
- Collaborate with architects, RTL developers, and design teams to enhance verification processes for complex architectural and microarchitectural features.
- Maintain and improve existing verification infrastructure and methodologies to align with evolving project needs.
- Document and drive technical reviews of verification plans and proofs with design and architecture teams.
- Contribute to defining verification infrastructure and TFMs (Test Frameworks and Methodologies) to ensure robust functional design verification.
- Utilize IP test environments and validation tools to uncover potential design flaws and ensure comprehensive validation.
The ideal candidate should show the following behavioral traits:
- Strong analytical and problem-solving skills, with a focus on innovation and continuous improvement.
- Effective communication and collaboration skills across diverse engineering teams.
- A passion for staying updated on industry trends and emerging technologies in functional verification.
Minimum qualifications, you must possess the below minimum qualifications to be initially considered for this position.
- Bachelor's or Master´s degree in Electrical Engineering, Computer Engineering, or a related field.
- Bachelor´s degree with 4+ years of experience
- OR Master´s degree with 3+ years if experience
- Experience listed above should be a combination of the following:
- proficiency in RTL design and functional verification techniques.
- working with IP test environments, validation tools, and methodologies.
- debugging and resolving complex technical issues in a pre-silicon environment.
- working with Design For Verification (DFV) principles and practices.
Must have unrestricted, permanent right to work in Mexico (this role is not eligible for visa or immigration sponsorship).
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Experience participating in technical reviews and contributing to project documentation.
Experienced Hire
Shift 1 (Mexico)
Mexico, Guadalajara
At the Data Center Group (DCG), we're committed to delivering exceptional products and delighting our customers. We offer both broad-market Xeon-based solutions and custom x86-based products, ensuring tailored innovation for diverse needs across general-purpose compute, web services, HPC, and AI-accelerated systems. Our charter encompasses defining business strategy and roadmaps, product management, developing ecosystems and business opportunities, delivering strong financial performance, and reinvigorating x86 leadership. Join us as we transform the data center segment through workload driven leadership products and close collaboration with our partners.
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
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Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
