19 publicaciones de empleo destacadas de soc power design engineer en tijuana, bcn (¡Están contratando!)

Low Power Design/Methodology Engineer
Qualcomm —Tijuana, B.C.
- Doctorado
- Maestría
- Licenciatura
SOC Power Design Engineer
North American Production Sharing —Tijuana, B.C.
- CAD
- Maestría
- Licenciatura
Postulación rápida
3d
Physical Design Engineer
Qualcomm —Tijuana, B.C.
- Licenciatura
2d
SOC Power Design Engineer
Qualcomm —Tijuana, B.C.
- Doctorado
- Maestría
- Licenciatura
Low Power Design Engineer
North American Production Sharing —Tijuana, B.C.
- Doctorado
- Maestría
- Python
Postulación rápida
1d
SoC Design & Synthesis Engineer
Qualcomm —Tijuana, B.C.
- Doctorado
- Maestría
- Licenciatura
Silicon Test Engineer (Digital)
Qualcomm —Tijuana, B.C.
- Informática
- Análisis de datos
- Java
Validation Engineer
Qualcomm —Tijuana, B.C.
- Doctorado
- Maestría
- Ensamblaje
SOC Design Verification Engineer– Pre-Si/Post-Si Verification
Qualcomm —Tijuana, B.C.
- Maestría
- C++
- Licenciatura
SoC Design & Synthesis Engineer
North American Production Sharing —Tijuana, B.C.
- Doctorado
- Maestría
- Licenciatura
Postulación rápida
3d
SOC Design Verification Engineer, Staff– Pre-Si/Post-Si Verification
Qualcomm —Tijuana, B.C.
- Doctorado
- Maestría
- C++
Clock / Power HW Validation Engineer
North American Production Sharing —Tijuana, B.C.
- Licenciatura
- Python
Postulación rápida
3d
Validation Engineer
North American Production Sharing —Tijuana, B.C.
- Doctorado
- Maestría
- Ensamblaje
Postulación rápida
8d
System Level Test Engineer
Qualcomm —Tijuana, B.C.
- Informática
- Maestría
- C++
Silicon Test Engineer (Digital ) - Multiple Levels
North American Production Sharing —Tijuana, B.C.
- Informática
- Análisis de datos
- Java
Postulación rápida
VLSI Frontend CAD Applications Engineer
North American Production Sharing —Tijuana, B.C.
- Doctorado
- CAD
- Maestría
Postulación rápida
ASIC DTCO, Timing and Technology Engineer
Qualcomm —Tijuana, B.C.
- Doctorado
- CAD
- Maestría
Implementation CAD Engineer
Qualcomm —Tijuana, B.C.
- Doctorado
- CAD
- Maestría
Implementation CAD Engineer
North American Production Sharing —Tijuana, B.C.
- Doctorado
- CAD
- Maestría
Postulación rápida

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Low Power Design/Methodology Engineer
Qualcomm —Tijuana, B.C.
3 years of experience doing low power digital ASIC design. Support SoC team to integrate low power / power management IP solution into wireless SoC chips and…
SOC Power Design Engineer
North American Production Sharing —Tijuana, B.C.
Review designs and guide IP designers' power intent design ensuring it meets SoC level low power implementation requirements.
Postulación rápida
3d

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Low Power Design/Methodology Engineer

Qualcomm -
Tijuana, B.C.

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Información del empleo

Cualificaciones

Doctorado
Maestría
Verilog
Sistemas eléctricos
Licenciatura
Perl
Python
Debugging

Descripción completa del empleo

Company:

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Design adaptive power management controller, on-chip sensor controller and digital power meter.

Perform RTL design, simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification for IP blocks.

Work closely with technology/circuit design team to close IP block specification/requirement.

Work closely with verification/physical design team to complete the IP design implementation.

Support SoC team to integrate low power / power management IP solution into wireless SoC chips and front-end design flows.

Work closely with system/software/test team to enable the low power feature in wireless SoC product.

Work closely with system/software/test team to enable functional safety feature in automotive SoC product.

Create/Enhance low power methodologies covering entire design cycle from RTL to GDS. Analyze how a new methodology will affect different phases of the design/verification cycle and work on fixing any issues.

Provide feedback for low-power chip and system architecture.

Understand and perform block & chip-level power analysis.

Understand and create block-level power models.

Minimum Qualifications:

Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Minimum Qualification

3 years of experience doing low power digital ASIC design.

Familiar with ASIC front-end design process and related flow, including u-arch, RTL coding, simulation, synthesis, STA.

Familiar with scripting languages like Python, Perl, TCL

Understanding of electrical engineering concepts, circuit analysis and logic design skills.

Preferred Qualifications

Previous experience in AVS (adaptive voltage scaling) desired.

Familiarity with advanced low power techniques and tools such as UPF, CLP, power aware DV and high speed clocking desired.

Proficiency in Verilog/System Verilog coding, verification techniques, and scripting language, such as: Perl, Python, Tcl, and Make etc.

Good understanding of SoC architecture/micro-architecture.

Understanding of automotive functional safety standard ISO 26262 and analysis technique (FMEA/FMEDA) is a plus.

Strong debugging capabilities at simulation, emulation, and Silicon environments, including ability to design interesting debug experiments.

Collaborate closely with cross-function team to research, design and implement performance and power management strategy for product roadmap.

Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [email protected] or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

To all Staffing and Recruiting Agencies : Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

If you would like more information about this role, please contact Qualcomm Careers .

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soc power design engineer empleos en tijuana, bcn

Low Power Design/Methodology Engineer

SOC Power Design Engineer

Physical Design Engineer

SOC Power Design Engineer

Low Power Design Engineer

SoC Design & Synthesis Engineer

Silicon Test Engineer (Digital)

Validation Engineer

SOC Design Verification Engineer– Pre-Si/Post-Si Verification

SoC Design & Synthesis Engineer

SOC Design Verification Engineer, Staff– Pre-Si/Post-Si Verification

Clock / Power HW Validation Engineer

Validation Engineer

System Level Test Engineer

Silicon Test Engineer (Digital ) - Multiple Levels

VLSI Frontend CAD Applications Engineer

ASIC DTCO, Timing and Technology Engineer

Implementation CAD Engineer

Implementation CAD Engineer

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